Biasing

Analog (Integrated) Circuit Design

12 Biasing

Biasing

\[ I_\mathrm{bias} = \frac{V_\mathrm{ref}}{R_1}. \]

So far, we have deferred one unresolved issue. We have studied ways to multiply and scale bias currents using current mirrors (see Section 6) and we have also found ways to buffer (and scale) bias voltages (see Section 8.1, scaling can be readily achieved by using a resistive divider in the feedback path). We can generate bias voltages by running a current through a resistor. However, what has not been discussed so far is how to generate one stable bias current in the first place.

If we had a stable reference voltage, then we could use the arrangement shown in Figure 64 to generate a bias current that is given by (note the use of feedback using an error amplifier which could be a simple OTA)

Using \(A_1\) and \(M_1\) the voltage \(V_\mathrm{ref}\) is regulated across \(R_1\) and available at the drain of \(M_1\).

Biasing

Figure 64: A constant-current generator based on OTA.

Biasing

\[ V_\mathrm{bias} = R_2 I_\mathrm{bias} = \frac{R_2}{R_1} V_\mathrm{ref}. \]

The resistor \(R_1\) will show variation with the process tolerance, but we can either (a) use an external resistor for a precise current generation, or (b) use some sort of trimming to correct this resistor value. Depending on the further use of the bias currents a variation of the resistor might not be a bad thing. Assuming we use the resulting bias current to generate somewhere a bias voltage \(V_\mathrm{bias}\) by running the current through resistor \(R_2\), then this voltage is given by

We can see in the above equation that the absolute values of \(R_1\) and \(R_2\) do not play a role, only the ratio is important. Luckily, components in integrated circuits match very well, so we can multiply and scale one reference voltage \(V_\mathrm{ref}\) across our IC.

Since all components on chip will experience manufacturing tolerances of at least \(\pm 10\%\) we strive for something more accurate. We can resort to an off-chip property like an externally provided reference current or voltage, or use the power supply as a voltage reference (often, power supply rails are specified to \(\pm 5 \ldots 10\%\)).

The only option left is to use a material property of the silicon itself for stable reference voltage generation.

12.1 Bandgap Reference

Bandgap Reference

\[ V_\mathrm{BE}\approx V_\mathrm{g0} \left( 1 - \frac{T}{T_0} \right) + V_\mathrm{BE0} \left( \frac{T}{T_0} \right) \tag{46}\]

\[ \Delta V_\mathrm{BE}= \frac{k T}{q} \ln \left( \frac{J_1}{J_2} \right) \tag{47}\]

It has been realized that a bipolar junction transistor (BJT) has the wonderful property, that the base-emitter voltage \(V_\mathrm{BE}\) has the following approximate relationship vs. temperature (Widlar 1971)

where \(V_\mathrm{g0} = 1.205\,\text{V}\) is the bandgap voltage of silicon extrapolated to \(0\,\text{K}\) and \(V_\mathrm{BE0}\) is the base-emitter voltage of a BJT at reference temperature \(T_0\). (Note that this is not the physical bandgap of silicon at \(0\,\text{K}\), which is about \(1.17\,\text{eV}\); \(V_\mathrm{g0}\) is the value obtained by extrapolating the nearly linear \(V_\mathrm{BE}(T)\) characteristic back to \(T = 0\,\text{K}\).) Further, the difference in \(V_\mathrm{BE}\) of two BJT operated at different emitter current densities \(J_1\) and \(J_2\) is given as

with \(k\) the Boltzmann constant, and \(q\) the elementary charge.

Adding Equation 46 and a scaled version of Equation 47 results in a reference voltage of value

Bandgap Reference

\[ V_\mathrm{ref} = V_\mathrm{g0} \left( 1 - \frac{T}{T_0} \right) + V_\mathrm{BE0} \left( \frac{T}{T_0} \right) + K \frac{k T}{q} \ln \left( \frac{J_1}{J_2} \right) \tag{48}\]

\[ K \frac{k}{q} \ln \left( \frac{J_1}{J_2} \right) = \frac{V_\mathrm{g0} - V_\mathrm{BE0}}{T_0}. \tag{49}\]

where \(K\) is a scaling factor that we are free to choose in the circuit implementation (we will see below that it is realized as a resistor ratio). Demanding zero temperature coefficient, \(\partial V_\mathrm{ref} / \partial T = 0\), fixes it to

Substituting Equation 49 back into Equation 48 makes every term proportional to \(T\) cancel, and only

Bandgap Reference

\[ V_\mathrm{ref} = V_\mathrm{g0} \tag{50}\]

remains. We thus have created an on-chip reference (called the bandgap voltage reference) which is almost independent of manufacturing tolerances with a very small temperature coefficient. Of course, this is only true neglecting second-order effects, but nevertheless, reference accuracies of \(\pm 1 \ldots 3\%\) without trimming are perfectly possible.

The original implementation in (Widlar 1971) uses NPN transistors. The question is, where do we find BJT in a CMOS process? Luckily, when looking at the typical implementations, we find that there is a layer sandwich of P-N-P available. While the PNPs constructed parasitically out of these available layers are available for free without extra processing cost, they are very slow, show unusually small \(\beta < 10\), and the collector is tied to \(V_\mathrm{SS}\) as it is the substrate. Still, for bandgap references, they are very useful.

A simple implementation of a bandgap reference circuit is shown in Figure 65. If we scale \(R_1\) and \(R_2\) correctly then we can achieve Equation 50. Note that the output voltage is ca. \(1.2\,\text{V}\), so operating this circuit on low supply voltages will be problematic.

Bandgap Reference

Figure 65: A simple bandgap reference.

Bandgap Reference

\[ \Delta V_\mathrm{BE}= \frac{k T}{q} \ln m \]

\[ I_\mathrm{bias} = \frac{\Delta V_\mathrm{BE}}{R_1} = \frac{1}{R_1} \frac{k T}{q} \ln m. \tag{51}\]

\(M_1\) to \(M_4\) are scaled in a way that in both branches the same bias current is flowing. Further, \(M_1\) and \(M_2\) ensure that there is the same potential at their sources. Since the two PNP are scaled by the factor \(m\), they are operated at different current densities despite carrying the same current, and consequently the following voltage develops across \(R_1\):

Hence, the bias current in all the branches is given by

Inspecting Equation 51 we see that \(I_\mathrm{bias} = k_1 T\) is a linear function of temperature \(T\), a property that is very useful and called PTAT (proportional to absolute temperature). Strictly, this holds only insofar as \(R_1\) itself is temperature-independent; a real resistor has a noticeable temperature coefficient (see Table 1), which is one reason why the resistor type matters in a bandgap design. With \(M_5\) we mirror this bias current into the output branch, and the output voltage \(V_\mathrm{ref}\) is then given by

Bandgap Reference

\[ V_\mathrm{ref} = V_\mathrm{BE}+ \frac{R_2}{R_1} \frac{k T}{q} \ln m. \]

Comparing with Equation 48 we see that the scaling factor \(K\) is realized here as the resistor ratio \(R_2 / R_1\). By proper selection of \(R_1\), \(R_2\) and \(m\) we can thus satisfy Equation 49 and arrive at Equation 50.

Bandgap Reference

Improved Bandgap Reference

For an improved implementation of Figure 65, the current mirrors should be cascoded, and a startup circuit should be included to guarantee proper operation after enabling it. Further, Equation 46 and Equation 47 build on the relationship \(I_\mathrm{C} = f(V_\mathrm{BE})\), while we control \(I_\mathrm{E}\) in this circuit. If \(\beta\) is large then \(I_\mathrm{C} \approx I_\mathrm{E}\), but this is not the case for the used PNPs.

Many more different bandgap architectures exist, with the Kuijk (Kuijk 1973) or the Brokaw (Brokaw 1974) types being popular choices.

Bandgap Reference

Figure 66: Simple bandgap reference circuit in Xschem.

The circuit of Figure 65 has been implemented in Xschem and is shown in Figure 66. The current sources have been improved by using cascodes. We are using the low-voltage current mirror type already introduced in Section 11. The bias voltages for the cascodes are generated via the voltage drops of \(R_3\) and \(R_4\), respectively.

No base current compensation for the BJTs is implemented, as it is assumed that the \(\beta\) of the PNP are similar although they are operated at different emitter current densities.

Note the addition of a startup branch with \(M_\mathrm{startup}\) which is inactive during normal operation but will inject a startup current if no proper bias point has yet been found.

There is no circuitry added for enabling/disabling the circuit, which would also be needed for a practical implementation. As usual, the MOSFET sizing has been done in this notebook.

The resistors \(R_{1-4}\) have been implemented out of unit elements of ca. \(5\,\text{k}\Omega\) for optimum matching. Building a bandgap for the first time on silicon likely will show a slightly deviating temperature coefficient, which is why we keep a few dummy resistors around in \(R_2\) to compensate the TC in a redesign.

Bandgap Reference

Figure 67: Reference voltage from simulated bandgap circuit.

The Xschem schematic is available here and the simulated reference voltage vs. temperature is shown in Figure 67. For a typical process we achieve a spread of the reference voltage of about \(\pm 0.16\%\) over the simulated temperature range of \(-30\,\text{degC}\) to \(125\,\text{degC}\), which corresponds to an average temperature coefficient of ca. \(20\,\text{ppm/K}\) (the ppm/K figure is the one you will usually find in a datasheet).

12.2 Banba Bandgap Reference

Please note how tight the dc operating point is in this design to keep all MOSFET saturated. We only use \(100\,\text{mV}\) nominally as headroom. The circuit in Figure 66 works only marginally at \(V_\mathrm{DD}= 1.5\,\text{V}\), but would not work at \(1.2\,\text{V}\) or lower. Improved circuit architectures for \(<1\,\text{V}\) operation exist; see (Banba et al. 1999) or (Eberlein et al. 2018).

Banba Bandgap Reference

Figure 68: Banba bandgap reference circuit in Xschem.

The Banba reference (Banba et al. 1999) is quite a bit trickier to design than the classical bandgap shown in Figure 65. It requires the use of an error amplifier; luckily, we can use the 5T-OTA which we designed in Section 8. Since a loop is involved the startup of this circuit is not easy and requires the use of a transient simulation and a proper pre-charge of critical nodes. We can use the ngspice scripting language to (a) set the temperature for a sweep, (b) run a transient simulation, and (c) capture the final reference voltage and save it.

A first design has been implemented and is shown in Figure 68, and the testbench is shown in Figure 69. The supply voltage (which could be lower than \(1.5\,\text{V}\)) is limited by our OTA design; however, it works well at \(V_\mathrm{DD}= 1.5\,\text{V}\). The simulated reference voltage (which is scaled to roughly \(V_\mathrm{bandgap} / 2\)) is shown in Figure 70.

Banba Bandgap Reference

Figure 69: Banba bandgap testbench Xschem.

Note the self-biasing of the OTA with the current generated in the reference branches. The feedback loop needs capacitors for stabilization, and we use area-efficient MOSFET for this task. For a detailed explanation of this circuit please refer to (Banba et al. 1999), but in brief, the operation is as follows:

The CTAT and PTAT currents required for compensating each other’s TCs are built using a \(\Delta V_\mathrm{BE}\) cell (given the PTAT current) with parallel resistors (providing the CTAT current). Voltages are sensed using an error amplifier and current sources are controlled to achieve matching currents in both branches. This current can then also be mirrored to flow through another resistor which can be scaled to produce the output voltage.

In comparison to the classical bandgap reference shown in Figure 65 (where the developed currents in all branches are PTAT) the currents developed in the Banba reference are constant vs. temperature.

The minimum supply voltage for the Banba reference is the \(V_\mathrm{BE}\) of the PNP plus the saturation voltage of one MOSFET current source, so ca. \(V_\mathrm{DDmin} \ge 0.8\,\text{V} + 0.2\,\text{V} \approx 1\,\text{V}\). Of course we also need to design an OTA which can work at this low supply.

Banba Bandgap Reference

Figure 70: Reference voltage from simulated Banba bandgap circuit.

Banba Bandgap Reference

Exercise: Improved Low-Voltage Bandgap

As an optional exercise for advanced users: Design a bandgap circuit following (Razavi 2021). Implement the shown two-stage OTA and the regulated cascode.

As a starting point, the design of Section 12.2 can be used. As this design will contain more blocks, please build up a hierarchical design, with the OTAs designed in separate subcircuits.

A well described design of a Banba bandgap reference (including a two-stage OTA and a regulated cascode for the output current mirror), covering much more details than discussed here, can be found in (Razavi 2021).

References

Banba, H., H. Shiga, A. Umezawa, et al. 1999. “A CMOS Bandgap Reference Circuit with sub-1-V Operation.” IEEE Journal of Solid-State Circuits 34 (5): 670–74. https://doi.org/10.1109/4.760378.

Brokaw, A. P. 1974. “A simple three-terminal IC bandgap reference.” IEEE Journal of Solid-State Circuits 9 (6): 388–93. https://doi.org/10.1109/JSSC.1974.1050532.

Eberlein, Matthias, Georgios Panagopoulos, and Harald Pretl. 2018. “A 40nW, Sub-IV Truly ‘Digital’ Reverse Bandgap Reference Using Bulk-Diodes in 16nm FinFET.” 2018 IEEE Asian Solid-State Circuits Conference (A-SSCC), November, 99–102. https://doi.org/10.1109/asscc.2018.8579306.

Kuijk, K E. 1973. “A precision reference voltage source.” IEEE Journal of Solid-State Circuits 8 (3): 222–26. https://doi.org/10.1109/JSSC.1973.1050378.

Razavi, Behzad. 2021. “The Design of a Low-Voltage Bandgap Reference [The Analog Mind].” IEEE Solid-State Circuits Magazine 13 (3): 6–16. https://doi.org/10.1109/mssc.2021.3088963.

Widlar, R. J. 1971. “New developments in IC voltage regulators.” IEEE Journal of Solid-State Circuits 6 (1): 2–7. https://doi.org/10.1109/jssc.1971.1050151.

References