First Circuit: MOSFET Diode

Analog (Integrated) Circuit Design

4 First Circuit: MOSFET Diode

First Circuit: MOSFET Diode

Figure 15: A MOSFET connected as a diode (drain shorted with gate).

The first (simple) circuit which we will investigate is a MOSFET, where the gate is shorted with the drain, a so-called MOSFET “diode”, which is shown in Figure 15. This diode is one half of a current mirror, which we will investigate in Section 6.

First Circuit: MOSFET Diode

Figure 16: Gate-source voltage of a MOSFET diode with W=1µm and L=0.13µm showing the gate-source voltage as a function of the bias current.

Why look at a single-transistor circuit at all? By starting with the simplest possible circuit we can develop important skills in circuit analysis (setting up and calculating a small-signal model, calculating open-loop gain, calculating noise, etc.) and Xschem/ngspice simulation testbench creation. We safely assume that the Mona Lisa also was not Leonardo da Vinci’s first painting, so let’s start slow.

This diode is usually biased by a current source, shown as \(I_\mathrm{bias}\) in the figure. Depending on MOSFET sizing with \(W\) and \(L\), a certain gate-source voltage \(V_\mathrm{GS}\) will develop. This voltage can be used as a biasing voltage for other circuit parts, for example. For a representative MOSFET sizing the \(V_\mathrm{GS}= f(I_\mathrm{bias})\) characteristic is shown in Figure 16. Note that in this MOSFET diode configuration \(V_\mathrm{DS}= V_\mathrm{GS}\).

First Circuit: MOSFET Diode

Figure 17: Drain current of a MOSFET diode with W=1µm and L=0.13µm showing the drain current as a function of the gate-source voltage.

If we flip Figure 16 by 90 degrees we can appreciate the name “MOSFET diode” as the characteristic resembles the one of a diode quite well (somewhat steep increase of the current beyond a certain threshold voltage). This is shown in Figure 17. Note that for negative \(V_\mathrm{GS}\) the drain current is essentially zero, as the MOSFET is off, confirming the diode-like behavior.

First Circuit: MOSFET Diode

Feedback in the MOSFET Diode

It is important to realize that this configuration employs a feedback loop for operation. The voltage at the drain of the MOSFET is sensed by the gate, and the gate voltage changes until \(I_\mathrm{D}\) is exactly equal to \(I_\mathrm{bias}\). In this sense this is probably the smallest feedback circuit one can build.

4.1 MOSFET Diode Sizing

MOSFET Diode Sizing

Exercise: MOSFET Diode Sizing

Please build a MOSFET diode circuit in Xschem where you use an LV NMOS, set \(I_\mathrm{bias} = 20\,\mu\text{A}\), \(L = 0.13\,\mu\text{m}\), and we want to use \(g_\mathrm{m}/I_\mathrm{D}= 10\) (often a suitable compromise between transistor speed and \(g_\mathrm{m}\) efficiency).

1. Use the figures in Section 3.2 to find out the proper value for \(W\).
2. What is the \(f_\mathrm{T}\) for this MOSFET? What is the value for \(g_\mathrm{m}\) and \(g_\mathrm{ds}\)?
3. Draw the circuit in Xschem, and simulate the operating point. Do the values match to the values found out before during circuit sizing?

We will now build this circuit in Xschem. For sizing the MOSFET we will use the \(g_\mathrm{m}/I_\mathrm{D}\) methodology introduced in Section 3.

MOSFET Diode Sizing

Solution: MOSFET Diode Sizing

1. Using the fact that \(I_\mathrm{bias} = I_\mathrm{D} = 20\,\mu\text{A}\) and \(g_\mathrm{m}/I_\mathrm{D}= 10\) directly provides \(g_\mathrm{m}= 0.2\,\text{mS}\).
2. Using the self-gain plot, we see that \(g_\mathrm{m}/g_\mathrm{ds}\approx 18.4\), so \(g_\mathrm{ds}\approx 10.9\,\mu\text{S}\). The \(f_\mathrm{T}\) can easily be found in the respective plot to be \(f_\mathrm{T} = 23\,\text{GHz}\). Note that the self-gain has to be read at \(V_\mathrm{DS}= V_\mathrm{GS}\approx 0.59\,\text{V}\), not at the \(V_\mathrm{DS}= V_\mathrm{DD}/2\) used for the characterization plots in Section 3.2: in a MOSFET diode the drain is tied to the gate, and \(g_\mathrm{ds}\) is a strong function of \(V_\mathrm{DS}\). The linked notebook does this self-consistently.

Before continuing, please finish the previous exercise. Once you are done, compare with the below provided solution.

MOSFET Diode Sizing

Solution: MOSFET Diode Sizing

3. The \(W\) of the MOSFET we find using the drain current density plot and the given bias current. Rounding to half-microns results in \(W = 1\,\mu\text{m}\).
4. Since we are looking at the graphs, we further find \(\gamma = 0.81\), \(V_\mathrm{ds,sat} = 0.18\,\text{V}\), and \(f_\mathrm{co} \approx 16\,\text{MHz}\).
5. In addition, we expect \(V_\mathrm{GS}\approx 0.6\,\text{V}\).

You can find an example Jupyter notebook to accurately extract these values here. An Xschem schematic for this exercise is provided as well.

4.2 MOSFET Diode Large-Signal Behavior

MOSFET Diode Large-Signal Behavior

Figure 18: Testbench for MOSFET diode transient settling.

As discussed above, the MOSFET diode configuration is essentially a feedback loop. Before we will analyze this loop in small-signal, we want to investigate how this loop settles in the time domain, and by doing this we can observe the large-signal settling behavior. To simulate this, we change the dc bias source from the previous example to a transient current source, which we will turn on after some picoseconds. The resulting Xschem testbench is shown in Figure 18.

MOSFET Diode Large-Signal Behavior

Power-Down Switches

It is thus generally a good idea to add power-down switches to the circuits to disable the circuit quickly by pulling floating nodes to a defined potential (usually \(V_\mathrm{DD}\) or \(V_\mathrm{SS}\)) and to avoid long intermediate states during power down. This will also allow a turn-on from a well-defined off-state.

When simulating the circuit in Figure 18 another interesting effect can be observed: While the turn-on happens quite rapidly (essentially the bias current source charges the gate capacitance, until the gate-source voltage is large enough that the drain current counteracts the bias current), the turn-off shows a very long settling tail. This is due to the fact that as the gate capacitance is discharged by the drain current, the \(V_\mathrm{GS}\) drops, which in turn reduces the drain current, which will make the discharge even slower. We have an effect similar to a capacitor discharge by a diode (Hellen 2003).

4.3 MOSFET Diode Small-Signal Analysis

Exemplary implementations of power-down switches are shown in the Xschem implementation of the improved OTA in Figure 60. Which \(W/L\) ratio should these transistors have? Well, in general, switches often have minimum length to be fast and to have low \(R_\mathrm{on}\). However, if there are no critical specifications (e.g., like power-down time), then these transistors are often used as dummy transistors for other circuit parts and are sized to fit the layout best.

MOSFET Diode Small-Signal Analysis

Figure 19: The MOSFET diode small-signal model (drain and gate are shorted, as well as source and bulk).

We now want to investigate the small-signal behavior of the MOSFET diode. Based on the small-signal model of the MOSFET in Figure 6 we realize that gate and drain are shorted, and we also connect bulk to source. We can thus simplify the circuit to the one shown in Figure 19.

MOSFET Diode Small-Signal Analysis

Ground Node Selection

For small-signal analysis we would not need to declare one node as the ground potential. However, when doing so, and selecting the ground node strategically, we can simplify the analysis, as we usually do not formulate KCL for the ground node (as we have only \(N-1\) independent KCL equations, \(N\) being the number of nodes in the circuit), and the potential difference equations are simpler if one node is at \(0\,V\).

MOSFET Diode Small-Signal Analysis

For calculating the small-signal impedance of the MOSFET diode we formulate Kirchhoff’s current law (KCL, also Kirchhoff’s first law or Kirchhoff’s junction rule) at the top node to get \[ I_\mathrm{bias} - s C_\mathrm{gs}V_\mathrm{gs}- g_\mathrm{m}V_\mathrm{gs}- g_\mathrm{ds}V_\mathrm{gs}= 0. \]

It follows that \[ Z_\mathrm{diode}(s) = \frac{V_\mathrm{gs}}{I_\mathrm{bias}} = \frac{1}{g_\mathrm{m}+ g_\mathrm{ds}+ s C_\mathrm{gs}}. \tag{5}\]

When neglecting \(g_\mathrm{ds}\), at dc we get \(Z_\mathrm{diode} = 1 / g_\mathrm{m}\), which is an important result and should be memorized.

MOSFET Diode Small-Signal Analysis

The Admittance is Your Friend

In circuit analysis it is often algebraically easier to work with admittance instead of impedance, so please remember that Ohm’s law for a conductance is \(I = G \cdot V\), and for a capacitance is \(I = s C \cdot V\). When writing equations, it is also practical to keep \(s C\) together, so we will strive to sort terms accordingly.

MOSFET Diode Small-Signal Analysis

The corner frequency of this low-pass can be calculated as \[ \omega_\mathrm{c} = \frac{g_\mathrm{m}+ g_\mathrm{ds}}{C_\mathrm{gs}} \approx \omega_\mathrm{T} \] which is pretty much the transit frequency of the MOSFET!

Looking at Equation 5 we see that for low frequencies, the diode impedance is resistive, and for high frequencies it becomes capacitive as the gate-source capacitance starts to dominate.

4.4 MOSFET Diode Stability Analysis

MOSFET Diode Stability Analysis

Open-Loop Gain, Closed-Loop Gain, and Loop-Gain—A Short Recap

Figure 20 shows a generic negative feedback system with input \(X(s)\) and output \(Y(s)\), where \(H_\mathrm{ol}(s)\) is the transfer function of the feed-forward path (also called open-loop gain) and \(G(s)\) is the transfer function of the feedback network. The loop-gain is the product of both transfer functions \(T(s) = H_\mathrm{ol}(s) G(s)\) and is used for the stability analysis. The closed-loop gain is defined as \(H_\mathrm{cl}(s) = Y(s) / X(s)\) can be derived with \(Y(s) = H_\mathrm{ol}(s) [X(s) - Y(s) G(s)]\) to be \[ H_\mathrm{cl}(s) = \frac{Y(s)}{X(s)} = \frac{H_\mathrm{ol}(s)}{1 + H_\mathrm{ol}(s) G(s)} = \frac{H_\mathrm{ol}(s)}{1 + T(s)} \tag{6}\]

MOSFET Diode Stability Analysis

Open-Loop Gain, Closed-Loop Gain, and Loop-Gain—A Short Recap

If the open-loop gain is sufficiently large \(H_\mathrm{ol}(s) \gg 1\), then the closed-loop gain simplifies to \(H_\mathrm{cl}(s) \approx 1 / G(s)\). This result is convenient, since it is independent of \(H_\mathrm{ol}(s)\). Therefore, the overall gain is only set with the feedback gain \(G(s)\) in operational amplifier circuits.

In the case of the MOSFET diode, \(G(s) = 1\) and therefore \(T(s) = H_\mathrm{ol}(s)\) and \(H_\mathrm{cl}(s) \approx 1\).

MOSFET Diode Stability Analysis

Open-Loop Gain, Closed-Loop Gain, and Loop-Gain—A Short Recap

Figure 20: The block diagram of a negative feedback system.

MOSFET Diode Stability Analysis

Open-Loop Gain, Closed-Loop Gain, and Loop-Gain—A Short Recap

Note that the feedback system depicted above shows an inversion in the feedback path. Sometimes this inversion is also included in the definition of \(G(s)\). Please be aware of this when reading literature, as different conventions exist.

MOSFET Diode Stability Analysis

Gain-Bandwidth Product in Feedback Systems

The gain-bandwidth product (GBP or GBWP) or transit frequency \(f_\mathrm{T}\) of a first-order open-loop system is the product of the open-loop dc gain \(H_\mathrm{ol,dc} = H_\mathrm{ol}(f = 0\,\text{Hz})\) and the open-loop \(-3\,\text{dB}\) cut-off frequency \(f_\mathrm{c,ol}\) of \(H_\mathrm{ol}(s)\). \[ \text{GBWP} = f_\mathrm{T,ol} = H_\mathrm{ol,dc} f_\mathrm{c,ol} \]

MOSFET Diode Stability Analysis

Gain-Bandwidth Product in Feedback Systems

If a frequency-independent negative feedback \(G\) (e.g., a resistive divider) is applied to this open-loop system, the closed-loop \(-3\,\text{dB}\) cut-off frequency \(f_\mathrm{c,cl}\) follows from the open-loop transit frequency and the feedback gain as \[ f_\mathrm{c,cl} = H_\mathrm{ol,dc} f_\mathrm{c,ol} G = f_\mathrm{T,ol} G \] i.e. the bandwidth is extended by exactly the factor by which the gain is reduced. The gain-bandwidth product is therefore preserved by the feedback, \[ H_\mathrm{cl,dc} f_\mathrm{c,cl} \approx \frac{1}{G} f_\mathrm{T,ol} G = f_\mathrm{T,ol}, \] which is the reason the GBWP is such a useful figure of merit.

MOSFET Diode Stability Analysis

Gain-Bandwidth Product in Feedback Systems

What does change is the frequency at which the closed-loop gain itself crosses unity: \[ f_\mathrm{T,cl} = f_\mathrm{T,ol} \sqrt{1 - G^2} \] Note that this is not the same quantity as the GBWP, even though the two coincide in the open-loop case — this distinction is a common source of confusion.

MOSFET Diode Stability Analysis

Gain-Bandwidth Product in Feedback Systems

For weak feedback (\(G \ll 1\)) the closed-loop unity-gain frequency is only slightly lower than \(f_\mathrm{T,ol}\), but for strong feedback it drops sharply, and for the unity-gain case \(G = 1\) it vanishes altogether, simply because the closed-loop gain \(H_\mathrm{cl} = H_\mathrm{ol}/(1+H_\mathrm{ol}) < 1\) never reaches unity in the first place. Keep this in mind for the MOSFET diode, where exactly this case \(G = 1\) applies.

This theory might be interesting when Middlebrook’s and Tian’s methods for loop gain analysis are later compared in the MOSFET diode testbench (see Figure 22).

MOSFET Diode Stability Analysis

Figure 21: The MOSFET diode small-signal circuit for open-loop analysis.

The diode-connected MOSFET forms a feedback loop. What is the loop gain? For calculating it, we are breaking the loop, and apply a dummy \(C_\mathrm{gs}^{*}\) at the right side to keep the impedances correct. A circuit diagram is shown in Figure 21, we break the loop at the red crosses. As we can see in this example, it is critically important when breaking up a loop for analysis (also for simulation!) to keep the terminal impedances the same. Only in special cases where the load impedance is very high or the driving impedance is very low is it acceptable to disregard loading effects!

MOSFET Diode Stability Analysis

By inspecting Figure 21 we see that \[ V_\mathrm{out} = - g_\mathrm{m}V_\mathrm{in} \frac{1}{g_\mathrm{ds}+ s C_\mathrm{gs}}. \]

The loop gain \(T(s)\) is thus \[ T(s) = (-1) \cdot \frac{V_\mathrm{out}}{V_\mathrm{in}} = \frac{g_\mathrm{m}}{g_\mathrm{ds}+ s C_\mathrm{gs}} = \frac{g_\mathrm{m}}{g_\mathrm{ds}} \frac{1}{1 + s C_\mathrm{gs}g_\mathrm{ds}^{-1}}. \tag{7}\]

We are now driving (with a voltage source) \(V_\mathrm{in}\) and record the output voltage \(V_\mathrm{out}\) to find the loop gain \(T(s)\).

Inspecting Equation 7 we realize that:

MOSFET Diode Stability Analysis

1. The dc gain \(g_\mathrm{m}/ g_\mathrm{ds}\) is the self-gain of the MOSFET, so \(20 \log_{10}(0.2 \cdot 10^{-3} / 10.9 \cdot 10 ^{-6}) = 25.3\,\text{dB}\).
2. There is a pole at \(s_\mathrm{p} = -g_\mathrm{ds}/ C_\mathrm{gs}\), i.e. at a frequency of \(f_\mathrm{p} = 10.9 \cdot 10 ^{-6} / (2 \pi \cdot 1.4 \cdot 10^{-15}) = 1.25\,\text{GHz}\).

With this single pole location in \(T(s)\) this loop is perfectly stable under all conditions (remember that a single pole results in a maximum phase shift of –90\(^\circ\)).

The question is now how to simulate this loop gain, i.e., how to break the loop open in simulation? In general there are various methods, as we can use artificially large (ideal) inductors and capacitors to break loops open and still establish the correct dc operating points for the ac loop analysis. This is called Rosenstark’s method (Rosenstark 1984). However, mimicking the correct loading can be an issue, and requires a lot of careful consideration.

There is an alternative method which breaks the loop open only by adding an ac voltage source in series (thus keeps the dc operating point intact), or injects current using an ac current source. Based on both measurements the loop gain can be calculated. This is called Middlebrook’s method (Middlebrook 1975) and is based on double injection, and we will use it for our loop simulations. This method is detailed in Section 16.

There are several other methods like Tian’s method (Tian et al. 2001), for example. A comprehensive overview can be found in (Neag et al. 2015) which describes ten different simulation-based loop gain analysis methods.

We now want to simulate the loop transfer function \(T(s)\) by using Middlebrook’s and Tian’s method and confirm our analysis above.

MOSFET Diode Stability Analysis

Exercise: MOSFET Diode Loop Analysis

Please build a simulation testbench in Xschem to simulate the open-loop transfer function of the MOSFET diode. Confirm the dc gain and pole location as given by Equation 7.

If you are getting stuck you can look at this Xschem testbench, shown in Figure 22.

MOSFET Diode Stability Analysis

Exercise: MOSFET Diode Loop Analysis

Figure 22: Testbench for MOSFET diode stability analysis.

MOSFET Diode Stability Analysis

What About Large-Signal Stability?

Keep in mind that the above simulation only verifies the small-signal stability in one certain operating point. If we later look at the stability of an OTA it might be a good idea to verify the small-signal stability in different operating points.

From simulation we see that the open-loop gain is \(24.9\,\text{dB}\) at low frequencies, which matches our prediction of \(25.3\,\text{dB}\) very well. In the Bode plot we see a low-pass with a \(-3\,\text{dB}\) corner frequency of \(1.4\,\text{GHz}\), which again is close to our prediction of \(1.25\,\text{GHz}\).

MOSFET Diode Stability Analysis

What About Large-Signal Stability?

Furthermore, one can apply a step response to the closed-loop system input and estimate the phase margin from the overshoot at the output (see “Automatic Control” lecture). One could also use a step-wise step response to simulate different operating points for a certain time (see “Introduction in Integrated Circuit Design” lecture).

4.5 MOSFET Diode Noise Calculation

MOSFET Diode Noise Calculation

Figure 23: The MOSFET diode small-signal model with drain noise source.

As a final exercise on the MOSFET diode circuit we want to calculate the output noise when we consider \(V_\mathrm{GS}\) the output reference voltage which is created when passing a bias current through the MOSFET diode. The bias current we will assume noiseless.

We are going to use the small-signal circuit shown in Figure 23.

MOSFET Diode Noise Calculation

The noise voltage at \(V_\mathrm{gs}\) is thus given as \[ \overline{V_\mathrm{n}^2} = |Z_\mathrm{diode}|^2 \overline{I_\mathrm{n,d}^2}. \]

The drain current noise of the MOSFET is given as (introduced in Section 2.1.2) \[ \overline{I_\mathrm{n,d}^2} = 4 k T \gamma g_\mathrm{m}. \]

As we have already calculated the small-signal diode impedance in Equation 5 we will use this result, and just note that the drain current noise of the MOSFET flows through this impedance.

MOSFET Diode Noise Calculation

For low frequencies (ignoring \(g_\mathrm{ds}\) and \(C_\mathrm{gs}\)) we get \[ \overline{V_\mathrm{n}^2} = |Z_\mathrm{diode}|^2 \overline{I_\mathrm{n,d}^2} = \frac{1}{g_\mathrm{m}^2} 4 k T \gamma g_\mathrm{m}= \frac{4 k T \gamma}{g_\mathrm{m}} \] which is the thermal noise of a resistor of value \(1 / g_\mathrm{m}\) enhanced by the factor \(\gamma\).

We now calculate the full equation, and after a bit of algebra arrive at \[ \overline{V_\mathrm{n}^2}(f) = \frac{4 k T \gamma g_\mathrm{m}}{(g_\mathrm{m}+ g_\mathrm{ds})^2 + (2 \pi f C_\mathrm{gs})^2}. \tag{8}\]

If we are interested in the PSD of the noise then Equation 8 gives us the result. If we are interested in the rms value (the total noise) we need to integrate this equation, using the following identity:

MOSFET Diode Noise Calculation

Useful Integral for Noise Calculations

\[ \int_0^\infty {\frac{a}{b^2 + c^2 f^2} df} = \frac{\pi}{2} \frac{a}{b \cdot c} \tag{9}\]

MOSFET Diode Noise Calculation

Using the integral help in Equation 9, we can easily transform Equation 8 to \[ V_\mathrm{n,rms}^2 = \int_0^\infty \overline{V_\mathrm{n}^2}(f) df = \frac{k T \gamma g_\mathrm{m}}{(g_\mathrm{m}+ g_\mathrm{ds}) C_\mathrm{gs}}. \tag{10}\]

The form of Equation 10 is the exact solution, but we gain additional insight if we assume that \(g_\mathrm{m}+ g_\mathrm{ds}\approx g_\mathrm{m}\) and then \[ V_\mathrm{n,rms}^2 = \frac{k T \gamma}{C_\mathrm{gs}}. \tag{11}\]

Inspecting Equation 11 we see our familiar \(kT/C\) noise multiplied by the factor \(\gamma\)!

MOSFET Diode Noise Calculation

Exercise: Total Output Noise of RC-Lowpass

If you have never calculated this before then you should work through the following: Calculate the total output noise of an \(RC\)-lowpass filter. Formulate the transfer function in the Laplace domain, and put the equivalent resistor noise voltage source at the input, calculate the transfer to the output, and then integrate the output PSD (like we did for the MOSFET diode noise).

MOSFET Diode Noise Calculation

Exercise: Total Output Noise of RC-Lowpass

You will find that the output noise is \[ V_\mathrm{n,rms}^2 = \frac{k T}{C} \] which is independent of \(R\)! This is a surprising result, and is the well-known \(kT/C\) noise. Intuitively, we could argue that the noise increases with larger \(R\), but at the same time, the bandwidth decreases and therefore \(R\) does not add additional noise. More detailed information and an intuitive explanation of \(kT/C\) noise can be found in (Sheikholeslami 2025).

MOSFET Diode Noise Calculation

Exercise: Total Output Noise of RC-Lowpass

Side note: The shortest derivation of this formula involves the equipartition theorem: Any system in thermal equilibrium with a reservoir of temperature \(T\) has a fluctuation energy of \(kT/2\) per degree of freedom. This \(RC\) system has one degree of freedom in the voltage on the capacitor, and the stored energy in the capacitor is \(CV_\mathrm{rms}^2/2\). Equating both energies we find that \(V_\mathrm{rms}^2 = kT/C\) (Sarpeshkar et al. 1993).

MOSFET Diode Noise Calculation

Exercise: Total Output Noise of RC-Lowpass

To calculate the total output noise of a generalized passive network Bode’s noise theorem is quite practical (see Section 17.2).

MOSFET Diode Noise Calculation

Calculating the rms noise voltage for our MOSFET diode we get \[ \sqrt{V_\mathrm{n,rms}^2} = \sqrt{\frac{1.38 \cdot 10^{-23} \cdot 300 \cdot 0.81}{1.4 \cdot 10^{-15}}} = 1.56\,\text{mV}, \] which is a sizeable value!

Think about it, can this rms noise voltage be measured with an oscilloscope?

If not, why?

We run circuits in this technology at \(V_\mathrm{DD}= 1.5\,\mathrm{V}\), which leaves us with a signal swing of ca.

\(1.1\,\mathrm{V_{pp}}\) (single-ended), resulting in a dynamic range in this case of \(20 \log_{10} (0.39 / 1.56 \cdot 10^{-3}) \approx 48\,\text{dB}\) assuming a sinusoidal signal.

In order to get a feeling which dynamic range is “good”, we can calculate the required dynamic range of a 16-bit audio ADC to be \(6.02 \cdot 16 + 1.76\,\text{dB} = 98.08\,\text{dB} \approx 100\,\text{dB}\).

This calculation should make clear that, for example, the correct sizing of the sample&hold capacitor is crucial for low rms noise voltage.

MOSFET Diode Noise Calculation

Be Careful with Parasitic Capacitances in IC Design

In general, in integrated circuit design, we often have only small parasitic capacitances on many nodes that could sum up to unwanted high noise according to Equation 11. If one wants to lower the noise an increased capacitance could limit the bandwidth (and thus the \(kT/C\) noise).

MOSFET Diode Noise Calculation

Large Bandwidth and Noise

Remember: Large bandwidth circuits integrate noise over a wide bandwidth resulting in (potentially) considerable rms noise. The way to lower the total noise is to lower the PSD of the noise contributions, which usually requires increased power consumption. So in a nutshell:

Large bandwidth plus small noise equals large power consumption.

MOSFET Diode Noise Calculation

Exercise: MOSFET Diode Noise

Please build a simulation testbench in Xschem to simulate the noise performance of the MOSFET diode, and confirm the rms noise value that we just calculated. Look at the rms value and the PSD of the noise, and play around with the integration limits. What is the effect? Can you see the flicker noise in the PSD? How much is its contribution to the rms noise?

MOSFET Diode Noise Calculation

Exercise: MOSFET Diode Noise

What is the value of \(f_\mathrm{co}\), and does it correspond to the above calculated one?

If you are getting stuck you can look at this Xschem testbench, shown in Figure 24.

MOSFET Diode Noise Calculation

Exercise: MOSFET Diode Noise

Figure 24: Testbench for MOSFET diode noise analysis.

4.6 Conclusion

References

Hellen, Edward H. 2003. “Verifying the diode–capacitor circuit voltage decay.” American Journal of Physics 71 (8): 797–800. https://doi.org/10.1119/1.1578070.

Middlebrook, R. D. 1975. “Measurement of loop gain in feedback systems.” International Journal of Electronics 38 (4): 485–512. https://doi.org/10.1080/00207217508920421.

Neag, Marius, Raul Oneţ, István Kovács, and Paul Mărtari. 2015. “Comparative Analysis of Simulation-Based Methods for Deriving the Phase- and Gain-Margins of Feedback Circuits with Op-Amps.” IEEE Transactions on Circuits and Systems I: Regular Papers 62 (3): 625–34. https://doi.org/10.1109/TCSI.2014.2370151.

Rosenstark, S. 1984. “Loop Gain Measurement in Feedback Amplifiers.” International Journal of Electronics 57 (3): 415–21. https://doi.org/10.1080/00207218408938921.

Sarpeshkar, R., T. Delbruck, and C. A. Mead. 1993. “White noise in MOS transistors and resistors.” IEEE Circuits and Devices Magazine 9 (6): 23–29. https://doi.org/10.1109/101.261888.

Sheikholeslami, Ali. 2025. “Noise and Distortion, Part IV [Circuit Intuitions].” IEEE Solid-State Circuits Magazine 17 (3): 29–31. https://doi.org/10.1109/MSSC.2025.3582840.

Tian, M., V. Visvanathan, J. Hantgan, and K. Kundert. 2001. “Striving for small-signal stability.” IEEE Circuits and Devices Magazine 17 (1): 31–41.

In this section we investigated the simple MOSFET-diode circuit. We learned important skills like how to derive a small-signal model and how to calculate important features like noise and open-loop gain for stability analysis. We introduced Middlebrook’s method to have a mechanism to open up loops in simulation (and calculation) without disturbing dc operating points or introduce errors by changing loading conditions.

If you feel that you have not yet mastered these topics or are uncertain in the operation of Xschem or ngspice, please go back to the beginning of the section and read through the theory and redo the exercises.

References