First Steps

Analog (Integrated) Circuit Design

2 First Steps

2.1 The Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET)

In this first chapter we will learn to use Xschem for schematic entry, and how to operate the ngspice SPICE simulator for circuit simulations. Further, we will make ourselves familiar with the transistor and other passive components available in the IHP Microelectronics SG13G2 technology. While this is strictly speaking a BiCMOS technology offering MOSFETs as well as SiGe heterojunction bipolar transistors (HBTs), we will use it as a pure CMOS technology, which is available from IHP under the name SG13C.

The Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET)

Figure 1: Circuit symbols for different voltage-controlled amplifiers (from left to right: MOSFET, bipolar junction transistor, junction FET, triode).

In this course, we will not dive into semiconductor physics and derive the device operation bottom-up starting from a fundamental level governed by quantum mechanics or a simplified solid-state physics based approach resulting in the well-known square-law model. Instead, we will treat the MOSFET behaviorally by assuming a 4-terminal device, and the performance of this device regarding its terminal voltages and currents we will largely derive from the simulation model.

The Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET)

MOSFET Background

Strictly speaking, the drain-source current of a MOSFET is controlled by the voltage between gate and bulk (\(V_\mathrm{GB}\)) and the voltage between drain and source (\(V_\mathrm{DS}\)). Since bulk is often connected to source anyway, and many circuit designers historically were already familiar with the operation of the bipolar junction transistor (BJT), it is common to consider the gate-source voltage (besides the drain-source voltage) as the controlling voltage.

Look at the transistor symbols shown in Figure 1. By treating them as a black box, where the output current is controlled by an input voltage, we can design circuits with all of them, even vacuum tubes would work in the same way.

Since we have an emphasis on integrated circuit design in this course, the size of the MOSFET can be adapted by changing its width \(W\) and its length \(L\). As we will see later, \(L\) has a profound impact on the MOSFET performance allowing to trade-off speed versus output conductance versus device-to-device matching. The width \(W\) is more of a scaling parameter to adapt the current density (strictly speaking charge density) forming in the MOSFET channel to a desired current. More about this later.

The circuit symbol that we will use for the n-channel MOSFET is shown in Figure 2, and for the p-channel MOSFET it is shown in Figure 3. A control voltage between gate (“G”) and source (“S”) controls the current flow between drain (“D”) and source. The MOSFET is a 4-terminal device, so the bulk (“B”) can also control the drain-source current flow. Often, the bulk is connected to source, and then the bulk terminal is not shown to declutter the schematics.

The Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET)

MOSFET Background

This focus on gate-source suggests that the source is special compared to the drain. In a typical physical MOSFET, however, the drain and source are constructed exactly the same (i.e., the MOSFET is a symmetric device), and which terminal is drain, and which terminal is source, is only determined by the applied voltage potentials, and can change dynamically during operation (think of a MOSFET operating as a switch… which side is the drain, which side is the source?).

The Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET)

MOSFET Background

Unfortunately, this focus on a “special” source has made its way into some MOSFET compact models. The model that is used in SG13G2 luckily uses the PSP model, which is formulated symmetrically with regards to drain and source, and is thus very well suited for analog and RF circuit design. For a detailed understanding of the PSP model please refer to the model documentation.

The Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET)

Figure 2: Circuit symbol of n-channel MOSFET.

Circuit symbol of n-channel MOSFET. For circuit design in this course, we will mostly use the middle symbol without bulk connection and an arrow indicating the source terminal.

The Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET)

Figure 3: Circuit symbol of p-channel MOSFET.

Circuit symbol of p-channel MOSFET. As for n-channel MOSFETs, we will mostly use the middle symbol without bulk connection and an arrow indicating the source terminal.

The Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET)

MOSFET Symbol

Looking at the MOSFET symbols in Figure 2 and Figure 3, you might have noticed that the left and the right symbols are symmetric for the drain and source terminals, while the middle symbol shows an arrow in the source connection.

The Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET)

MOSFET Symbol

This is a common “error” in many important textbooks and online resources (Razavi 2017; Gray et al. 2009; Sansen 2006), and it is important to be aware of this. The drain and source of a MOSFET are (usually) symmetric, and the current flow can be reversed by changing the applied voltages (and then also drain and source swap; generally, for an NMOS, the connection with the higher potential is the drain, the one with the lower potential is the source.

The Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET)

MOSFET Symbol

For a PMOS, the situation is inverted).

The symbol in the middle of Figure 2 and Figure 3 is thus misleading, because is suggests that the source is special and that the current can only flow in one direction. This is not the case, and it is important to be aware of this when designing circuits, especially when using MOSFETs as switches.

The Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET)

MOSFET Symbol

As many symbols are drawn this way, we will also use this symbol in this course (and the resemblance to a bipolar junction transistor is intentional), but please be aware of the fact that the drain and source are symmetric, and the current can flow in both directions depending on the bias voltages!

The Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET)

Figure 4: The MOSFET large-signal model.

For hand calculations and theoretical discussions we will use the following simplified large-signal model, shown in Figure 4. A current source \(I_\mathrm{D}\) models the current flow between drain and source, and it is controlled by the three control voltages \(V_\mathrm{GS}\), \(V_\mathrm{DS}\), and \(V_\mathrm{SB}\). Note that in this way (since \(I_\mathrm{D}= f(V_\mathrm{DS})\)) also a resistive behavior between D and S can be modelled. In case that B and S are shorted then simply \(V_\mathrm{SB} = 0\) and \(C_\mathrm{SB}\) is shorted.

The MOSFET large-signal model. In general, all capacitors are nonlinear, i.e., they depend on their terminal voltages.

The Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET)

MOSFET Bulk Terminal

In many situations we will connect the bulk and source terminals of a MOSFET together, which results in a simplified large-signal model. As an exercise, look at Figure 4 and draw this simplified model (hint: look at Figure 6 and Figure 7 for inspiration).

In an ideal MOSFET no dc current is flowing into the gate, the behavior is purely capacitive. We model this by two capacitors: \(C_\mathrm{GG}= C_\mathrm{GS}+ C_\mathrm{GD}+ C_\mathrm{GB}\) is the total capacitance when looking into the gate of the MOSFET. \(C_\mathrm{GS}\) is usually the dominant capacitance, and \(C_\mathrm{GD}\) models the capacitive feedback between D and G, usually induced by a topological overlap capacitance in the physical construction of the MOSFET. This capacitance is often small compared to \(C_\mathrm{GS}\), but in situations where we have a large voltage swing at the drain, this capacitance will be affected by the Miller effect (see Section 17.1). In hand calculations we will often set \(C_\mathrm{GD}= C_\mathrm{GB}= C_\mathrm{DB}= C_\mathrm{SB}= 0\).

To model a physical MOSFET there will be also a requirement for resistors in the model to account for terminal access resistances (\(R_\mathrm{G}\), \(R_\mathrm{D}\), and \(R_\mathrm{S}\)) as well as resistors to model second-order effects like non-quasistatic operation. For lower frequencies and bulk MOSFETs we will not consider these resistors, and just deal with the capacitive behavior.

The Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET)

Mathematical Notation

Throughout this material, we will largely stick to the following notation standardized by IEEE:

Now, as we are skipping the bottom-up approach of deriving the MOSFET large-signal behavior from basic principles, we need to understand the behavior of the elements of the large-signal model in Figure 4 by using a circuit simulator and observing what happens. And generally, a first step in any new IC technology should be to investigate basic MOSFET performance, by doing simple dc sweeps of \(V_\mathrm{GS}\) and \(V_\mathrm{DS}\) and looking at \(I_\mathrm{D}\) and other large- and small-signal parameters.

As a side note, the students who want to understand MOSFET behavior from a physical angle should consult the MOSFET chapter from the JKU course “Design of Complex Integrated Circuits” (VL 336.048). A great introduction into MOSFET operation and fabrication is given in (Hu 2010), which is available freely online and is a recommended read. A very detailed description of the MOSFET (leaving usually no question unanswered) is provided in (Tsividis and McAndrew 2011).

Now, in order to get started, basic Xschem testbenches are prepared, and first simple dc sweeps of various voltages and currents will be done. But before that, please look at the important note below!

The Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET)

Mathematical Notation

• A dc quantity is shown with an upper-case variable name with upper-case subscripts, like \(V_\mathrm{GS}\).
• Double-subscripts denote dc sources, like \(V_\mathrm{DD}\) and \(V_\mathrm{SS}\).
• An ac (small-signal) quantity (incremental quantity) has a lower-case variable name with a lower-case subscript, like \(g_\mathrm{m}\).
• A total quantity (dc plus ac) is shown as a lowercase variable name with upper-case subscript, like \(i_\mathrm{DS}\).
• An upper-case variable name with a lower-case subscript is used to denote signal amplitudes (phasors), like \(V_\mathrm{gs}\), \(V_\mathrm{ds}\), \(I_\mathrm{d}\).

The Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET)

A Comment on Active and Passive Devices and Linear vs. Nonlinear

In contrast to the passive devices resistor \(R\), inductor \(L\), and capacitor \(C\), which can only dissipate energy (and are often treated in a linearized fashion), transistors (like the MOSFET) are called “active”, since they can provide signal power amplification. However, transistors can not create energy out of thin air, but merely convert dc energy (supplied by the power supply) into ac energy (Manley and Rowe 1956).

The Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET)

A Comment on Active and Passive Devices and Linear vs. Nonlinear

They have to have nonlinear transfer characteristics to do this, but it has been shown that a piecewise-linear characteristic is sufficient (Jakoby 2022). This is very good news for circuit design, as usually we strive for linear behaviour!

2.1.1 Large-Signal MOSFET Model

We start with an investigation into the large-signal MOSFET model shown in Figure 4 by using the simple testbench for the LV NMOS shown in Figure 5.

Large-Signal MOSFET Model

Figure 5: Testbench for NMOS dc sweeps.

Large-Signal MOSFET Model

MOSFET Simulation Model

For modelling the MOSFET behavior in a circuit simulator like ngspice different models are available. Some of these models have been widely adopted, like the BSIM (Berkeley Short-channel IGFET Model) or PSP (Philips Penn State) model. The PSP model version 103.6 is used in the IHP SG13G2 PDK for the LV and HV MOSFET. This model has several advantages:

Large-Signal MOSFET Model

MOSFET Simulation Model

• Physics-based surface-potential model
• Symmetric formulation with respect to drain and source
• Support for mobility reduction, velocity saturation, DIBL, gate current, lateral doping gradient effects, STI stress, NQS, etc.

The PSP 103.6 model documentation can be found here. In chapter 8 the dc operating point output of the model (these parameters can be queried in ngspice) is explained, which is helpful to interpret the simulation output.

Large-Signal MOSFET Model

Exercise: MOSFET Investigation

Please try to execute the following steps and answer these questions:

1. Get the LV NMOS testbench (available at https://github.com/iic-jku/analog-circuit-design/blob/main/xschem/dc_lv_nmos.sch) working in your IIC-OSIC-TOOLS environment.
2. Make yourself familiar with Xschem (change the schematic in various ways, run a simulation, graph the result).
3. Make yourself familiar with ngspice (run various simulations, save nets and parameters, use the embedded Xschem graphing, explore the interactive ngspice shell to look at MOSFET model parameters).

Large-Signal MOSFET Model

Exercise: MOSFET Investigation

4. Explore the LV NMOS sg13_lv_nmos:
   1. How is \(I_\mathrm{D}\) affected by \(V_\mathrm{GS}\) and \(V_\mathrm{DS}\)?
   2. Change \(W\) and \(L\) of the MOSFET. What is the impact on the above parameters? Can you explain the variations?
   3. Look at the capacitance values for \(C_\mathrm{GS}\), \(C_\mathrm{GB}\), \(C_\mathrm{GD}\), and \(C_\mathrm{DB}\). How are they affected by \(W\) and \(L\) and by changing the bias conditions (play with \(V_\mathrm{GS}\) and \(V_\mathrm{DS}\))?

Large-Signal MOSFET Model

Exercise: MOSFET Investigation

4. Explore the LV NMOS sg13_lv_nmos:
   4. When looking at the model parameters in ngspice, you see that there is a \(C_\mathrm{GD}\) and a \(C_\mathrm{DG}\). Why is this, what could be the difference? Sometimes these capacitors show a negative value, why? (Hint: Study Note 1)

Large-Signal MOSFET Model

Exercise: MOSFET Investigation

5. Build testbenches in Xschem for the LV PMOS, the HV NMOS, and the HV PMOS. Explore the different results.
   1. For a given \(W\) and \(L\), which device provides more drain current? How are the capacitances related?
   2. If you would have to size an inverter, what would be the ideal ratio of \(W_p/W_n\)? Will you exactly design this ratio, or are the reasons to deviate?

Large-Signal MOSFET Model

Exercise: MOSFET Investigation

5. Build testbenches in Xschem for the LV PMOS, the HV NMOS, and the HV PMOS. Explore the different results.
   3. There are LV and HV MOSFETs, and you investigated the difference in performance. What is the rationale when designing circuits for selection either an LV type, and when to choose an HV type?
6. Build a test bench to explore the body effect, start with LV NMOS.
   1. What happens when \(V_\mathrm{SB}\neq 0\)?

2.1.2 Small-Signal MOSFET Model

\[ g_\mathrm{m}= \frac{\partial I_\mathrm{D}(V_\mathrm{GS}, V_\mathrm{DS}, V_\mathrm{SB})}{\partial V_\mathrm{GS}}, \]

\[ g_\mathrm{ds}= \frac{\partial I_\mathrm{D}(V_\mathrm{GS}, V_\mathrm{DS}, V_\mathrm{SB})}{\partial V_\mathrm{DS}} \]

As you have seen in the previous investigations, the large-signal model of Figure 4 describes the behavior of the MOSFET across a wide range of voltages applied at the MOSFET terminals. Unfortunately, for hand analysis dealing with a nonlinear model is close to impossible, at the very least it is quite tedious.

However, for many practical situations, we bias a MOSFET with a set of dc voltages applied to its terminal, and only apply small signal excursions during operation. If we do this, we can linearize the large-signal model in this dc operating point, and resort to a small-signal model which can be very useful for hand calculations. Many experienced designers analyze their circuits by doing these kind of hand calculations and describing the circuit analytically, which is a great way to understand fundamental performance limits and relationships between parameters.

We will use the small-signal MOSFET model shown in Figure 6 for this course. The current-source \(i_\mathrm{d}= g_\mathrm{m}v_\mathrm{gs}\) models the drain current \(I_\mathrm{D}\) as a function of \(V_\mathrm{GS}\) with

and the output conductance \(g_\mathrm{ds}\) models the dependence of the drain current on \(V_\mathrm{DS}\):

The drain current dependency on the source-bulk voltage (the so-called “body effect”) is introduced by the current source \(g_\mathrm{mb}V_\mathrm{sb}\):

Small-Signal MOSFET Model

\[ g_\mathrm{mb}= -\frac{\partial I_\mathrm{D}(V_\mathrm{GS}, V_\mathrm{DS}, V_\mathrm{SB})}{\partial V_\mathrm{SB}} = \frac{\partial I_\mathrm{D}(V_\mathrm{GS}, V_\mathrm{DS}, V_\mathrm{BS})}{\partial V_\mathrm{BS}} \]

Note the minus sign: raising the source potential above the bulk increases \(V_\mathrm{th}\) and thus lowers \(I_\mathrm{D}\). By referencing \(g_\mathrm{mb}\) to \(V_\mathrm{BS} = -V_\mathrm{SB}\) it comes out positive, just like \(g_\mathrm{m}\), which is the common convention; typically \(g_\mathrm{mb}/ g_\mathrm{m}\approx 0.1 \ldots 0.3\). This is why the \(g_\mathrm{mb}V_\mathrm{sb}\) source in Figure 6 is drawn with its arrow pointing opposite to the \(g_\mathrm{m}V_\mathrm{gs}\) source.

Small-Signal MOSFET Model

Figure 6: The MOSFET small-signal model.

Small-Signal MOSFET Model

Figure 7: The MOSFET small-signal model when source and bulk are shorted.

As has been mentioned before, in many situations (and whenever we want to use a simplified model) we connect source and bulk of the MOSFET together. This results in the much simplified small-signal model shown in Figure 7.

Small-Signal MOSFET Model

\[ \overline{I_\mathrm{n}^2} = 4 k T \gamma g_\mathrm{d0}, \tag{1}\]

Like any electronic device, the MOSFET introduces noise into the circuit. In this course we will only consider the drain-source current noise of the MOSFET, given by

where \(\overline{I_\mathrm{n}^2}\) is the one-sided power-spectral density of the noise in A\(^2\)/Hz; \(k\) is the Boltzmann constant; \(T\) is the absolute temperature; \(\gamma\) is a (fitting) parameter in simplified theory changing between \(\gamma = 2/3\) in saturation and \(\gamma =1\) for triode operation; \(g_\mathrm{d0}\) is equal to \(g_\mathrm{m}\) in saturation and \(g_\mathrm{ds}\) in triode.

Small-Signal MOSFET Model

MOSFET Triode and Saturation Region

Sometimes we will refer to different operating modes of the MOSFET like “saturation” or “triode.” Generally speaking, when the drain-source voltage is small, then the MOSFET acts as a voltage-controlled resistor (since the impact of both \(V_\mathrm{GS}\) and \(V_\mathrm{DS}\) on \(I_\mathrm{D}\) is large), and this mode of operation we call “triode” mode.

Small-Signal MOSFET Model

MOSFET Triode and Saturation Region

When the drain-source voltage \(V_\mathrm{DS}\) is increased, at some point the drain-source current saturates and is only a weak function of the drain-source voltage, while still being well controlled by \(V_\mathrm{GS}\). This mode is called “saturation” mode.

Small-Signal MOSFET Model

MOSFET Triode and Saturation Region

As you can see in the large-signal investigations, these transitions happen gradually, and it is difficult to define a precise point where one operating mode switches to the other one. In this sense we use terms like “triode” and “saturation” only in an approximate sense.

Small-Signal MOSFET Model

Figure 8: The MOSFET small-signal basic pi-model.

We can also consider an even more reduced small-signal MOSFET model compared to Figure 7, which is shown in Figure 8. In this, we just consider the transconductance \(g_\mathrm{m}\), the input capacitor \(C_\mathrm{gg}\), as well as the output conductance \(g_\mathrm{ds}\). Note that we can redraw the pi-model of Figure 8 into the \(\tau\)-model of Figure 9. Depending on the circuit configuration, either the first or the second form results in simpler calculations of the circuit equations.

Small-Signal MOSFET Model

Figure 9: The MOSFET small-signal basic T-model.

Small-Signal MOSFET Model

Exercise: MOSFET Model Transformation

Can you show, with which circuit manipulations you can transform the pi-model of Figure 8 into the T-model of Figure 9?

Small-Signal MOSFET Model

It can easily be derived using the simplified MOSFET small-signal model of Figure 7 by driving it with a voltage source and shorting the output to ground (neglecting the feed-forward current introduced by \(C_\mathrm{gd}\)): \[ \omega_\mathrm{T} = 2 \pi f_\mathrm{T} \approx \frac{g_\mathrm{m}}{C_\mathrm{gg}} = \frac{g_\mathrm{m}}{C_\mathrm{gs}+ C_\mathrm{gd}+ C_\mathrm{gb}}. \tag{2}\]

A metric which is useful to assess the speed of a MOSFET is the so-called transit frequency \(f_\mathrm{T}\).

It is defined as the frequency where the small-signal current gain (output current divided by the input current) of a MOSFET driven by a voltage-source at the input and loaded by a voltage source at the output drops to unity (reaches one).

This frequency is an extrapolated frequency where the MOSFET operation is dominated by several second-order effects (hence Equation 2 is not valid any longer).

A rule-of-thumb is to use a MOSFET up to approximately \(f_\mathrm{T} / 10\).

In any case, \(f_\mathrm{T}\) is a proxy of the speed of a MOSFET; in other words, how much input capacitance \(C_\mathrm{gg}\) is incurred when creating a certain \(g_\mathrm{m}\).

Small-Signal MOSFET Model

Exercise: MOSFET Transit Frequency

As a home exercise, try to derive Equation 2 starting from Figure 7. This is a useful exercise to verify your understanding of the small-signal model.

Small-Signal MOSFET Model

Exercise: MOSFET Small-Signal Parameters

Please try to execute the following steps and answer the following questions:

Now we need to see how the small-signal parameters seen in Figure 6 can be investigated and estimated using circuit simulation.

Small-Signal MOSFET Model

Exercise: MOSFET Small-Signal Parameters

1. Reuse the LV NMOS testbench (available at https://github.com/iic-jku/analog-circuit-design/blob/main/xschem/dc_lv_nmos.sch).
2. Explore the LV NMOS sg13_lv_nmos:
   1. How are \(g_\mathrm{m}\) and \(g_\mathrm{ds}\) changing when you change the dc node voltages?
   2. What is the ratio of \(g_\mathrm{m}\) to \(g_\mathrm{mb}\)? What is the physical reason behind this ratio (you might want to revisit MOSFET device physics at this point)?
   3. Take a look at the device capacitances \(C_\mathrm{gs}\), \(C_\mathrm{gd}\), and \(C_\mathrm{gb}\). Why are they important? What is the \(f_\mathrm{T}\) of the MOSFET?

Small-Signal MOSFET Model

Exercise: MOSFET Small-Signal Parameters

2. Explore the LV NMOS sg13_lv_nmos:
   4. Look at the drain noise current according to the MOSFET model and compare with a hand calculation of the noise. In the noise equation there is the factor \(\gamma\), which in triode is \(\gamma=1\) and in saturation is \(\gamma=2/3\) according to basic text books. Which value of \(\gamma\) are you calculating? Why might it be different?

Small-Signal MOSFET Model

Exercise: MOSFET Small-Signal Parameters

3. Go back to your testbench for the LV PMOS sg13_lv_pmos:
   1. What is the difference in \(g_\mathrm{m}\), \(g_\mathrm{ds}\), and other parameters between the NMOS and the PMOS? Why could they be different?

Small-Signal MOSFET Model

Note 1: Maxwell Capacitance Matrix

A Maxwell capacitance matrix (Maxwell 1873) provides the relation between voltages on a set of conductors and the charges on these conductors. For a given conductor set with \(N\) conductors (and thus \(N\) terminals) the relation is \[ \mathbf{Q} = \mathbf{C} \cdot \mathbf{V} \] where \(\mathbf{Q}\) is a vector of the charges on the \(N\) conductors, \(\mathbf{C}\) is a \(N \times N\) capacitance matrix, and \(\mathbf{V}\) is the potential vector.

Small-Signal MOSFET Model

Maxwell Capacitance Matrix

In the case of two conductors and physical capacitances between them, \(\mathbf{C}\) is given by \[ \mathbf{C} = \begin{pmatrix} C_{11} + C_{12} & -C_{12} \\ -C_{12} & C_{12} + C_{22} \\ \end{pmatrix} \] where \(C_{11}\) and \(C_{22}\) are the auto capacitances of the conductors towards infinity (ground), and \(C_{12} = C_{21}\) is the mutual capacitance between the two conductors. Note that these are the physical capacitances, and that they are therefore not identical to the entries of \(\mathbf{C}\): a diagonal entry of \(\mathbf{C}\) is the sum of all capacitances touching a node (\(\partial Q_1 / \partial V_1 = C_{11} + C_{12}\)), whereas an off-diagonal entry is negative (\(\partial Q_1 / \partial V_2 = -C_{12}\)).

Small-Signal MOSFET Model

Maxwell Capacitance Matrix

Using the above equation to calculate \(Q_1\) (the charge on conductor \(1\)) results in \[ Q_1 = ( C_{11} + C_{12} ) V_1 - C_{12} V_2 = C_{11} (V_1 - 0) + C_{12} (V_1 - V_2) \] which is the expected result.

Such a Maxwell capacitance formulation is also used in the MOSFET model to describe the charge at a terminal as a function of potential at another terminal. So, \[ C_\mathrm{GD}= \frac{\partial Q_\mathrm{G}}{\partial V_\mathrm{D}} \] or \[ C_\mathrm{GG}= \frac{\partial Q_\mathrm{G}}{\partial V_\mathrm{G}} \] with \(Q_\mathrm{G}\) the charge at terminal G in response to either \(V_\mathrm{D}\) or \(V_\mathrm{G}\). Note that in a MOSFET, generally \(C_{xy} \ne C_{yx}\)!

Small-Signal MOSFET Model

Maxwell Capacitance Matrix

This also explains the negative capacitance values that a simulator sometimes reports (see the exercise above): the off-diagonal entries of a Maxwell capacitance matrix carry a negative sign by construction, so a reported \(C_\mathrm{GD}\) of, e.g., \(-1\,\text{fF}\) simply means a physical coupling capacitance of \(1\,\text{fF}\) between gate and drain.

2.2 Conclusion

References

Gray, Paul R., Paul J. Hurst, Stephen H. Lewis, and Robert G. Meyer. 2009. Analysis and Design of Analog Integrated Circuits. Wiley.

Hu, Chenming. 2010. Modern Semiconductor Devices for Integrated Circuits. Pearson.

Jakoby, Bernhard. 2022. “Achieving signal power amplification using energetically passive devices.” e&i Elektrotechnik Und Informationstechnik 139 (6): 477–84. https://doi.org/10.1007/s00502-022-01046-9.

Manley, J. M., and H. E. Rowe. 1956. “Some General Properties of Nonlinear Elements-Part I. General Energy Relations.” Proceedings of the IRE 44 (7): 904–13. https://doi.org/10.1109/jrproc.1956.275145.

Maxwell, James Clerk. 1873. A Treatise on Electricity and Magnetism. Vol. 1. Clarendon Press.

Razavi, Behzad. 2017. Design of Analog CMOS Integrated Circuits. McGraw-Hill.

Sansen, Willy M. C. 2006. Analog Design Essentials. Springer.

Tsividis, Yannis, and Colin McAndrew. 2011. Operation and Modeling of the MOS Transistor. Oxford University Press.

Congratulations for making it thus far! By now you should have a solid grasp of the tool handling of Xschem and ngspice, and you should be familiar with the large- and small-signal operation of both NMOS and PMOS, and the parameters describing these behaviors. If you feel you are not sufficiently fluent in these things, please go back to the beginning of Section 2.1 and revisit the relevant sections, or dive into further reading about the MOSFET operation, like in (Hu 2010).

References