Fifty Nifty Variations of Two-Transistor Circuits

A tribute to the versatility of MOSFETs

Authors

Affiliations

Harald Pretl

Johannes Kepler University

Matthias Eberlein

Johannes Kepler University

ImportantThis is a web edition of a published IEEE article

The version of record is

H. Pretl and M. Eberlein, “Fifty Nifty Variations of Two-Transistor Circuits: A tribute to the versatility of MOSFETs,” IEEE Solid-State Circuits Magazine, vol. 13, no. 3, pp. 38–46, 2021, doi: 10.1109/MSSC.2021.3088968, available from IEEE Xplore.

The original paper is copyrighted by IEEE. © 2021 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media. Please cite the published version linked above.

This page reproduces the accepted author version of the text; all fifty schematics have been redrawn from scratch in Python using schemdraw, and the drawing code sits next to each figure in the repository. The two accompanying posters are archived on Zenodo under CC BY 4.0.

Abstract

We present a compendium of two-MOS-transistor circuits, spanning the range from simple standard configurations to ingenious arrangements. Using these building blocks, circuit designers can assemble a vast array of complex analog functions. This (incomplete) collection shall serve as a reference and inspiration to junior circuit designers and hopefully contains at least one unexpected example for the professional engineer.

Index terms — Basic circuits, body-driven, CMOS, MOSFET.

1 Introduction

Analog circuit design is wonderfully creative. The metal-oxide-semiconductor field-effect transistor (MOSFET) is an exceptionally versatile device, operating as a switch, a current source, a resistor, a diode, and a capacitor, depending on bias conditions. For fun and to demonstrate the sheer infinite possibilities in circuit design using MOSFETs, we present a collection of simple (and sophisticated) circuits, which employ two transistors (not counting fixed bias and supply voltages and fixed bias currents). Often, circuit designers construct complex circuits from these basic building blocks.

This compendium is a tribute to all the ingenious minds out there and the circuit design giants on whose shoulders we are standing today! This sample of practical two-transistor circuits, to the best of the authors’ knowledge, contains beneficial and often used configurations. A few circuits are of a more curious and academic nature, they might lack power-supply rejection or show other deficiencies, and some circuits use the body connection as active terminals (Figure 2, 16, 27, 29, 46, 49 and 50), which might not be feasible in some complementary metal-oxide-semiconductor (CMOS) technologies. Generally, one has to be aware of the body effect and its impact.

Many more two-transistor circuits are yet to be discovered. An exhaustive search of graphs using one or two voltage-controlled current sources (which are well approximated by MOSFETs) resulted in 150 potentially useful circuits (Klumperink et al. 2001), where one of them was identified as a valuable new amplifier configuration (Bruccoleri et al. 2001). By pushing this idea further, a study identified 582 possible circuit topologies using two transistors—repeating this exercise using three transistors, a whopping 56280 elementary configurations have been found (Shahhosseini et al. 2018).

To keep our overview reasonable, we do not include complementary circuits which can be constructed by swapping n-MOSFET (NMOS) for p-MOSFET (PMOS) devices (or vice versa). This can be applied to Figure 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 15, 16, 17, 18, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 44, 45, 46, 47 and 48.

2 Logic Circuits

First, we present simple circuits which operate on logical inputs, like the inverter (Figure 1) and an improved low-voltage version that is exploiting the body terminals in a dynamic threshold voltage MOSFET (DTMOS) inverter (Figure 2). Terminating an unused input of a logic gate to a logical one or zero, an electrostatic discharge (ESD) safe tie-zero or tie-one, respectively, should be utilized like the one shown in Figure 3.

Using the unusual arrangement in Figure 4, we can implement an XNOR logic function, while the implementations of NAND and NOR, as shown in Figure 5 and Figure 6, respectively, are the fundamental building blocks of the digital universe.

Figure 1: The ubiquitous digital inverter. The input voltage \(V_\mathrm{in}\) switches one of both transistors on, and the other is off (Wanlass and Sah 1963).

Figure 2: The DTMOS inverter achieves an improved current drive at low leakage current. It needs to be operated at low supply voltages to avoid a forward bias of the well diodes (Assaderaghi et al. 1994).

Figure 3: An ESD-safe tie-zero for unused CMOS logic inputs (no MOSFET gate is tied directly to a supply rail). The tie-one can be constructed accordingly.

Figure 4: Using a current source \(I_\mathrm{bias}\) with finite output impedance to bias this structure, this circuit implements an XNOR logic function (\(V_\mathrm{out} = \overline{V_a \oplus V_b}\)). The logic inputs \(V_a\) and \(V_b\) must be driven by low-ohmic logic levels between \(V_\mathrm{DD}\) and \(V_\mathrm{SS}\) (Fulkerson 1975).

Figure 5: This series connection of two MOSFETs realizes a logical NAND function (\(V_\mathrm{out} = \overline{V_a \land V_b}\)).

Figure 6: This circuit complements the logic gates implemented in Figure 4 and Figure 5 and realizes a NOR function (\(V_\mathrm{out} = \overline{V_a \lor V_b}\)).

3 Basic Circuits

This section presents the basic circuits constituting the fundamental building blocks of the analog and mixed-signal world, like the current mirror shown in Figure 7. The differential pair (Figure 8) is alternatively constructed with or without a tail current source, often called a pseudo-differential pair. The source follower in Figure 9 is one of the elementary circuits useful in many situations, just like the common-source amplifier with active load (Figure 10). Adding a cascode to a circuit is a powerful technique. For example, a common-gate combined with a common-source stage is depicted in Figure 11, or the cascade of two common-gate stages is shown in Figure 12. Of course, the essential common-gate stage qualifies as a two-transistor circuit as well (Figure 13).

The transmission gate (Figure 14) is an essential building block, allowing switching voltages and currents (a feat making the MOSFET such a valuable device). With a straightforward extension, a multiplexer can be constructed (Figure 15). However, in most practical implementations, a set of transmission gates will be applied for this purpose.

Figure 7: The basic current mirror, simultaneously copying and sizing of \(I_\mathrm{out} = (W/L)_2 / (W/L)_1 \cdot I_\mathrm{in}\) according to the dimensions of \(M_1\) and \(M_2\) (Widlar 1965).

Figure 8: The ubiquitous differential pair, like the current mirror in Figure 7, is a fundamental building block in integrated circuits (Blumlein 1937). The pseudo-differential variant spares the tail current source’s headroom in exchange for reduced common-mode rejection, but with the benefit of class-AB action.

Figure 9: The source follower (or common-drain stage), utilizing \(M_2\) as a current source to bias \(M_1\).

Figure 10: The common-source amplifier with active load.

Figure 11: The cascoded common-source stage boosting the output impedance of \(M_1\) considerably to \(r_\mathrm{out} \approx g_\mathrm{m2}/(g_\mathrm{ds1} \cdot g_\mathrm{ds2})\).

Figure 12: The cascoded common-gate stage. Note that $ I_ I_$, but the impedance level changes drastically, creating gain or a high output impedance at the output node.

Figure 13: The common-gate stage, employing \(M_2\) as a current source to bias transistor \(M_1\).

Figure 14: The transmission gate switches between \(V_1\)/\(I_1\) and \(V_2\)/\(I_2\) for both voltage and current (and it works rail to rail, too).

Figure 15: The 2-to-1 multiplexer, connecting either \(V_1\) or \(V_2\) to \(V_\mathrm{com}\). Depending on \(V_\mathrm{sel1}\) and \(V_\mathrm{sel2}\), the MOSFETs are alternately switched on or off.

4 Improved Basic Circuits

It has been realized that the digital inverter shown in Figure 1 can also be employed as an excellent low-voltage amplifier (\(V_\mathrm{out}\)) or transconductance stage (\(I_\mathrm{out}\)) when both transistors are biased in saturation. Shorting \(V_\mathrm{in}\) and \(V_\mathrm{out}\), a replica bias is readily available (Nauta and Seevinck 1989).

Several low-voltage circuits can be implemented using the body terminal of a MOSFET as an additional control input, like the low-voltage current mirror depicted in Figure 16. Some arrangements allow for precise voltage gain and high-speed operation, as demonstrated by the circuits shown in Figure 17 and Figure 18.

Figure 19 presents an enhanced version of the source follower, also known as class-B (push/pull) amplifier. Degeneration is a primary method to improve matching, noise figure, or output resistance. Different MOSFET-only implementations are feasible (Figure 20 and Figure 21), with the implementation in Figure 21 allowing to tune the performance during operation by varying \(V_\mathrm{bias}\).

Combining a common-source stage with a common-gate topology (Nauta 1995), as shown in Figure 22, results in a differential-output transconductance stage with a single-ended low-ohmic input. It can thus be used under impedance-matched conditions, also providing some noise and linearity cancellation under ideal bias (Blaakmeer et al. 2008).

In yet another twist, a source-follower can be combined with a common-gate stage, resulting in a useful amplifier configuration (see Figure 23), which has been found by systematically generating graphs consisting of two transconductance stages (Bruccoleri et al. 2001).

Figure 16: This circuit is an improved version of Figure 7 in that it allows a low voltage operation of the current mirror, requiring a voltage headroom substantially less than \(V_\mathrm{GS1}\) (Blalock and Allen 1995).

Figure 17: The common-source amplifier with diode load is sometimes called a wide-band amplifier due to its potentially high-speed operation. Here, the gain is set precisely at \(A_\mathrm{v} = V_\mathrm{out}/V_\mathrm{in} = -\sqrt{(W/L)_1 / (W/L)_2}\), only depending on transistor sizing (and neglecting the body effect).

Figure 18: The folded version of Figure 17, having the advantage of a removed body effect in \(M_2\) and a ground-referred output node (Sansen 2006).

Figure 19: The class-B push-pull follower can be considered an enhanced version of the simple source follower shown in Figure 9. Lacking a class-A bias component, this structure is subjected to cross-over distortion.

Figure 20: The MOSFET-R degenerated common-source stage. By sizing \(M_2\) appropriately, the degeneration can be adapted (Sansen 2006). This arrangement using two transistors can also increase the length of a (compound) device, for example, in current mirrors, as otherwise, MOSFET with different \(L\) will not match well.

Figure 21: A variation of the implementation shown in Figure 20, where the degeneration of \(M_1\) can be adapted by tuning \(V_\mathrm{bias}\).

Figure 22: A common-gate–common-source topology offering impedance-matched single-ended input and differential output while simultaneously canceling noise and distortion (Blaakmeer et al. 2008).

Figure 23: This low-noise amplifier was discovered by using an exhaustive search of potential two-transistor wide-band amplifiers. For practical implementation, \(M_1\) requires an ac coupling (and proper biasing) in its gate connection to keep \(M_2\) in saturation (Bruccoleri et al. 2001).

5 Biasing Circuits

The generation of a bias voltage is a task often encountered in analog circuit design. When the requirements on stability are moderate, a simple configuration, as shown in Figure 24, might be sufficient. A surprisingly stable voltage reference can be constructed from two MOSFETs with different threshold voltages, as demonstrated in Figure 25. Occasionally, a bias voltage with a well-defined proportionality to temperature is needed, for example, in temperature sensor circuits. This effect can be achieved by a proportional-to-absolute temperature (PTAT) voltage generator like the one depicted in Figure 26. Sometimes, circuits are based on obscure second-order effects, like charge trapping in the Si–SiO\(_2\) interface traps, used in the clocked circuit shown in Figure 27, which can create pA-currents in an area-efficient manner.

Figure 24: A (simple) bias voltage generator using the current source \(M_1\) to bias \(M_2\) so that \(V_\mathrm{bias} = V_\mathrm{GS2}\).

Figure 25: A constant bias voltage generator (\(M_1\) and \(M_2\) must have different threshold voltages \(V_\mathrm{th1} \neq V_\mathrm{th2}\)) (Seok et al. 2012).

Figure 26: A PTAT voltage generator, if \(M_1\) and \(M_2\) are kept in subthreshold operation (Amaravati et al. 2013).

Figure 27: This pA current source is based on the periodic filling and flushing of Si–SiO\(_2\) interface traps by alternating \(M_1\) between accumulation and inversion (by proper choice of \(V_\mathrm{bias1}\), \(V_\mathrm{bias2}\), and the switching levels of \(V_\mathrm{clk}\)). It can operate with reasonably high clock frequencies and still create tiny currents (Cilingiroglu et al. 2003).

6 Diverse Circuit Elements

The various operating modes of a MOSFET can be utilized differently and lead to practical circuit elements. The cross-coupled differential pair (see Figure 28 and Figure 29) synthesizes a negative resistance, which can cancel losses, for example, in oscillators or \(Q\)-enhanced \(LC\) filters. Since the effective capacitance between the gate terminal and the source/drain connection of a MOSFET is a function of biasing conditions, the arrangement demonstrated in Figure 30 can be employed as a varactor.

Using local feedback to create a MOSFET-“diode,” two anti-parallel diodes can replace conventional pn-diodes, for example, in voltage limiters (Figure 31). The gate oxide of a MOSFET usually offers the highest capacitance density in a given CMOS technology, so an anti-parallel pair of MOSFETs (see Figure 32) can substitute a linear capacitor with a capacitor that has mediocre linearity but is much smaller. This structure has the additional benefit of symmetric parasitic capacitors at both terminals.

An active inductor can be simulated by transistors using gyrator principles (Qiu 1991), offering a significant area reduction compared to a passive implementation based on a coil constructed from the metal layers. An exemplary implementation based on two MOSFETs is shown in Figure 33.

Figure 28: Two transistors with cross-coupling form a negative resistance between \(V_p\) and \(V_n\), mainly employed in oscillators and comparators. As in Figure 8, the bias current source can be replaced by a fixed potential.

Figure 29: This circuit is a low-voltage version of Figure 28, where the body controls the MOSFET, avoiding the significant \(V_\mathrm{GS}\) drop at \(V_p\) and \(V_n\) (Chatterjee et al. 2005).

Figure 30: The varactor (the capacitance between \(V_p\) and \(V_n\) depends on the bias voltage \(V_\mathrm{bias}\)) is often used in voltage-controlled oscillators. In most technologies, the NMOS can be put inside the n-well so that the varactor works in accumulation, providing an optimized tuning range and high \(Q\) (Soorapanth et al. 1998).

Figure 31: The anti-parallel MOSFET diodes can be employed for many things, for example, voltage clamping.

Figure 32: The anti-parallel MOSFET capacitors make the differential capacitance more linear and symmetrical. As in Figure 30, an NMOS-in-n-well is an option.

Figure 33: This circuit, which is a similar configuration as the flipped voltage follower in Figure 47, can function as an active inductor, providing \(L = C_\mathrm{GS1} / (g_\mathrm{m1} \cdot g_\mathrm{m2})\) (Yue Wu et al. 2000).

7 Analog Signal Processing

The processing of analog signals is an often needed task when devising circuits. The area-efficient division of voltages (see Figure 34) or currents (either employing a current mirror as in Figure 7 or the advanced usage of the Bult current divider, shown in Figure 35) can become handy. In any implementation of an analog-to-digital converter (ADC), a sample-hold stage is required, often exploiting the excellent switching capabilities of the MOSFET, as demonstrated in Figure 36, where a MOSFET configured as a capacitor stores the sampled voltage. Sampling can be used for frequency conversion, which can also be achieved by the arrangement in Figure 37, where the time-variant change of the transconductance of \(M_1\) causes a mixing effect (Cripps et al. 1977).

Realizing the MOSFET operating as a controlled resistor in the triode region, Figure 36 can be easily transformed into a (programmable) low-pass filter, as shown in Figure 38. By rewiring the sampling switch into the diode-equivalent MOSFET configuration, a voltage peak detector (Figure 39) and an approximate voltage doubler (Figure 40) can be built for ac signals.

Figure 34: An area-efficient voltage divider. If \(M_1\) and \(M_2\) are of the same size, then \(V_\mathrm{out} \approx V_\mathrm{in}/2\). Often, a PMOS version is a better choice since it can avoid the body effect by tying the body to the respective source for \(M_1\) and \(M_2\).

Figure 35: The Bult current divider (if \(M_1\) and \(M_2\) are of identical size, then \(I_\mathrm{in}\) is precisely split in half between \(I_\mathrm{out1}\) and \(I_\mathrm{out2}\)) (Bult and Geelen 1992).

Figure 36: A sample-and-hold, implementing the gate capacitance of \(M_2\) as a storage capacitor (a low to zero \(V_\mathrm{th}\) would be an advantage in this case) (Mao et al. 1969).

Figure 37: In the dual-gate MOSFET (a similar arrangement as in Figure 11), the periodic local oscillator signal \(V_\mathrm{lo}\) causes the time-variant change of the transconductance of \(M_1\), resulting in a frequency conversion from the input \(V_\mathrm{rf}\) to the output \(I_\mathrm{out}\) (Cripps et al. 1977).

Figure 38: The circuit of Figure 36 becomes a continuous-time low-pass filter if \(M_1\) gets a fixed bias instead of a clock signal. Note that this circuit transforms into a high-pass filter when \(M_1\) and \(M_2\) are swapped.

Figure 39: A voltage peak-detector, where \(V_\mathrm{peak} = V_\mathrm{in,max} - V_\mathrm{GS1}\).

Figure 40: A similar circuit to Figure 39 can function as an approximate voltage doubler when driven by a sinusoidal input voltage (on negative swings of \(V_\mathrm{in}\) the capacitor \(M_1\) gets charged to \(|V_\mathrm{in}| - V_\mathrm{GS2}\), which is added to \(V_\mathrm{in}\) during positive swings when \(M_2\) is off). As in any circuit with negative voltages, proper connection of the wells is required (Villard 1901).

8 Simple Circuits with a Twist

While most CMOS processes provide thin-film resistors, it is often difficult to realize values in the M\(\Omega\) to G\(\Omega\) range. The MOSFET in triode or off-state (Figure 41 and Figure 42) is a good alternative at a much smaller silicon area. An improved version of a diode-connected MOSFET is demonstrated in Figure 43. This two-transistor construction, called the ultra-low-power diode (ULPD), considerably lowers the leakage current in the reverse direction. A level-shift is often needed in a signal path, which can be implemented as pictured in Figure 44. Sometimes a simple circuit shows a surprising property, and the linear \(I\)-to-\(V\) converter shown in Figure 45 is such an example.

Circuits working with the body terminal as a fourth control input can add many additional possibilities, like the logic level-shift implemented in Figure 46. Feedback is an essential tool in a circuit designer’s box: the flipped voltage follower (shown in Figure 47) and the regulated cascode (see Figure 48) are significantly improved versions of their simpler counterparts shown in Figure 9 and Figure 12, respectively.

Figure 41: The controlled (high-impedance) floating resistor.

Figure 42: This arrangement creates an enormous resistance between \(V_p\) and \(V_n\), although susceptible to temperature and process variations (Harrison 2002).

Figure 43: The ULPD with reduced leakage in the reverse direction when \(V_n > V_p\) (Levacq et al. 2004).

Figure 44: The floating level shift (or “floating battery”) effectively shifts a bias point between \(V_p\) and \(V_n\), as \(V_\mathrm{shift} = V_p - V_n = V_\mathrm{GS1} + V_\mathrm{GS2}\).

Figure 45: This circuit is a perfectly linear \(I\)-to-\(V\) converter with \(V_\mathrm{out}/I_\mathrm{in} = [\mu C_\mathrm{ox} \cdot (W/L) \cdot (V_\mathrm{bias} - 2 V_\mathrm{th})]^{-1}\), if we assume a square-law behavior, and \(M_1\) and \(M_2\) are of same size and kept in saturation (and neglecting body effect) (Bult and Wallinga 1987).

Figure 46: This circuit shifts a digital input voltage \(V_\mathrm{in}\) to an output voltage \(V_\mathrm{out}\) swinging around \(V_\mathrm{SS}\) (Hong-Yi Huang and Jing-Fu Lin 2002).

Figure 47: The flipped voltage follower is an improved version of Figure 9, employing feedback to lower the output impedance to \(r_\mathrm{out} = g_\mathrm{ds2}/(g_\mathrm{m1} \cdot g_\mathrm{m2})\) (Ramirez-Angulo et al. 2002).

Figure 48: The regulated cascode, increasing the effect of the cascode \(M_1\) by \(g_\mathrm{m2}/g_\mathrm{ds2}\) due to feedback. Note that the source of \(M_2\) can be tied to ground if combined with a common-source input stage (Hosticka 1979).

9 Using the MOSFET as a BJT

Inherent to the physical structure of a MOSFET is a bipolar junction transistor (BJT), often showing inadequate performance like poor current gain \(\beta \ll 10\). Still, it can be employed to generate a temperature-dependent voltage, like the circuit shown in Figure 49, whose complementary-to-absolute temperature (CTAT) property is an excellent addition to the PTAT behavior of the circuit in Figure 26. Compensating the low \(\beta\) of the parasitic BJT can be achieved by implementing the structure depicted in Figure 50, which improves the accuracy of a bandgap circuit built from these augmented BJT devices.

Figure 49: Exploiting the parasitic (lateral) PNP transistor inherent in a PMOS structure, this simple CTAT voltage generator can be created (Vittoz 1983).

Figure 50: The parasitic BJT (lateral or vertical), introduced in Figure 49, often suffers from poor \(\beta\). This circuit forces the collector current of the parasitic (vertical) PNP to \(I_\mathrm{C} = I_\mathrm{bias1} - I_\mathrm{bias2}\), although the collector terminal (being the \(p\)-substrate) is not accessible. By doing this, the resulting \(V_\mathrm{EB} = V_\mathrm{E} - V_\mathrm{B}\) can be accurately employed in a bandgap circuit (Eberlein 2017).

10 Conclusion

Fifty practical circuit snippets, employing just two MOS transistors, have been presented. This compilation’s motivation is to celebrate the creativity in analog circuit design and demonstrate the versatility of the fabulous MOSFET. Walking through these fifty examples—and considering that this compendium is far from complete (Shahhosseini et al. 2018)—leaves one in awe thinking about the endless possibilities when an analog circuit designer is given a handful of these fantastic transistors!

Acknowledgment

The authors thank the reviewers for their many mindful suggestions. We want to thank our colleagues at the Institute for Integrated Circuits, JKU, for their support in preparing this manuscript and many enlightening discussions!

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